The paper describes the first step of methodology for designing dependable hardware which is based on field programmable gate array technology. This step means the development of patterns using Event-B language useful thanks to mathematical proofs of a model. The report shows and describes the patterns developed according to synchronism technique because a great number of systems are synchronous. The patterns describe different component interconnections which are often used in hardware design. These patterns are the necessary condition to convert correctly developed model into hardware description language (e.g. VHDL).

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